View S1L9224X01_1303345.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

VIDEO-CD 2ND GENERATION
S1L9224X01
INTRODUCTION
80-QFP-1420C
The S1L9224 is a servo signal processor designed specifically for the samsung videoCD designed using the BICMOS process. RF block and picture quality enhancing Items are built-in. The processor is a hard-wired free-adjustment servo with the pre-signal parts adjustment point automatically adjusted.
FEATURES
* * * * * * * * * * * * * * * * * * * Focus error amplifier & servo control Tracking error amplifier & servo control Sled amplifier Embedded CLV control LPF Mirror, FOK, and defect detector circuit APC (Auto Laser Power Control) circuit for constant laser power Double speed play available Circuit for interruption countermeasure FE bias & focus servo offset free adjustment EF balance & tracking loop gain free adjustment Tracking servo offset free adjustment Enhanced auto-sequence algorithm (fast-search) Tracking muting by window mirror Current, voltage pick-up interaction available Embedded RF 3T boost circuit Enhanced RF equalize AGC circuit Built-in focus, tracking 2x filter adjust Single power supply: +5 V Related products - KS9287 data processor - KS9284 data processor - KA9258D/KA9259D motor driver
1
S1L9224X01
VIDEO-CD 2ND GENERATION
PIN CONFIGURATION
76 BOOSTC2
75 VISEL
74 VCC
68 PDD
66 PDC
79 RFO
67 PDB
EQI RFO2 RFI ARF ARF2 EQC GND MCP DCB
1 2 3 4 5 6 7 8 9
65 PDA 64 DVEE 63 FEBIAS 62 TG2 61 TGU 60 FDFCT 59 FE1 58 FE2 57 TDFCT 56 DVDD 55 LPFT 54 TE1 53 TE2 52 TZC 51 ATSC 50 TEO 49 TE48 FEO 47 FE46 SPDLO 45 SPDL44 SL43 SLO 42 SL+ 41 SSTOP FOK 40
77 RFL
78 RF-
80 IRF
73 VR
71 PD
72 LD
70 E MCK 35
FRSH 10 DCC2 11 DCC1 12 FSET 13 VDDA 14 ENBR 15 ENC 16 ENVO 17 ISET 18 VREG 19 WDCK 20 SMDP 21 SMON 22 SMEF 23 DEFECT 24 FLB 25 FS3 26 FGD 27 LOCK 28 TRCNT 29 ISTAT 30 EFM 31 EFM2 32 ASY 33 VSSA 34 MDATA 36 MLT 37 RESET 38 MIRROR 39
S1L9224
2
69 F
VIDEO-CD 2ND GENERATION
S1L9224X01
BLOCK DIAGRAM
76 BOOSTC2
75 VISEL
74 VCC
68 PDD
66 PDC
79 RFO
67 PDB
EQI
1
65 PDA 64 DVEE 63 FEBIAS 62 TG2 61 TGU 60 FDFCT 59 FE1 58 FE2 57 TDFCT 56 DVDD 55 LPFT 54 TE1 53 TE2 52 TZC 51 ATSC 50 TEO 49 TE48 FEO 47 FE46 SPDLO 45 SPDL44 SL43 SLO 42 SL+ 41 SSTOP FOK 40
77 RFL
78 RF-
80 IRF
73 VR
71 PD
72 LD
70 E
RF I/V Amp. 3T Boost Circuit
VREF Gen.
APC Cont
RFO2 2 RFI 3 ARF 4 ARF2 5 EQC 6 GND 7 MCP 8 DCB 9 FRSH 10 DCC2 11 DCC1 12 FSET 13 VDDA 14 ENBR 15 ENC 16 ENVO 17 ISET 18 VREG 19 WDCK 20 SMDP 21 SMON 22 SMEF 23 DEFECT 24 FLB 25 FS3 26 FGD 27 LOCK 28 TRCNT 29 ISTAT 30 EFM 31 EFM2 32 ASY 33 VSSA 34 MCK 35 MDATA 36 MLT 37 RESET 38 MIRROR 39 Spindle Servo EFM Slice & Envelope EFM Micom Data Interface Logic Bias Gen. Auto-Sequence Move System Logic Adjustment-Free Control System Logic Micom to Servo Control Decoder Seld Amp. Defect Detection Circuit Mirror Detection Circuit FOK Detect 0 RF EQ & AGC Focus Error Amp Febias Adjust Logic PAD4 Tracking Error I/V Amp E/F Balance & Gain Adjust PAD39 Tracking Phase & Gain Compensation Jump Pulse Generation Offset Control
Focus Phase & Gain Compensation Offset Cancel Circuit
69 F
3
S1L9224X01
VIDEO-CD 2ND GENERATION
PIN DESCRIPTION
Table 1. Pin Description No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Pin Name EQI RFO2 RFI ARF ARF2 EQC GND MCP DCB FRSH DCC2 DCC1 FSET VDDA ENBR ENC ENVO ISET VREG WDCK SMDP SMON SMEF DEFECT FLB FS3 FGD LOCK TRCNT ISTAT EFM EFM2 I/O I I I O O I G I I I I O I P I I O I O I I I I O I I I I O O O O RF AGC & eqaualize input pin RFO buffer output and RFOB output for capacity merge with RFO (by MICOM) EFM comparator input pin RF AGC & EQ output pin. RF AGC & EQ output pin (output enable controlled by C1FLAG) AGC_equalize level control pin, VCA input pin & noise eliminating CAP pin Ground (RF block) Half-wave rectifier CAP pin for MIRROR output Defect max duty limiting CAP pin Focus search generating & charge/discharge CAP pin Defect min duty generating DC eliminating CAP pin. (connected DCC1) Defect min duty generating DC eliminating CAP pin (connected DCC2) Focus, tracking, spindle peaking frequency compensation bias pin 5V power pin for servo Bias pin for envelope EFM-slice RF envelope DC bias extract voltage input pin RF envelope output pin Focus search, tracking jump, sled kick voltage generating bias pin 3.4V regulator output pin 88.2kHz input pin from DSP SMDP input pin of DSP SMON input pin of DSP External LPF time constant connection pin of CLV servo error signal Defect output pin. CAP pin for focus loop rising low band Focus loop' high frequency gain adjustment pin s Focus loop' high frequency gain adjustment pin s Sled run away preventing pin (L: sled off and tracking gain up) Track count output pin Internal status output pin RFO slice EFM output pin (to DSP) EFM comparator integrating output pin Description
4
VIDEO-CD 2ND GENERATION
S1L9224X01
Table 1. Pin Description(Continued) No. 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 Pin Name ASY VSSA MCK MDATA MLT RESET MIRROR FOK SSTOP SL+ SLO SLSPDLSPDLO FEFEO TETEO ATSC TZC TE2 TE1 LPFT DVDD TDFCT FE2 FE1 FDFCT TGU TG2 FEBIAS DVEE PDA I/O I G I I I I O O I I O I I O I O I O I I I O I P I I O I I I I G I Auto asymmetry control input pin Servo part analog VSSA power supply pin Micom clock pin Data input pin Data latch input pin Reset input pin MIRROR detect output pin Focus ok output pin Pick up's maximum lead-in diameter position check pin Sled servo non-inverting input Sled servo output Sled servo inverting input Spindle AMP inverting input pin Spindle AMP output pin Focus servo AMP inverting input pin Focus servo AMP output pin Tracking servo AMP inverting input pin Tracking servo AMP output pin Anti-shock input pin Tracking zero crossing input pin Tracking servo input pin Tracking error AMP output pin Tracking error integrating input pin (auto adjust) Logic DVDD power supply pin Defect tracking error integrating CAP connection pin Focus servo input pin Focus error AMP output pin When defect, focus error integrating CAP connection pin High frequency tracking gain switching CAP connection pin Time constant controlling tracking loop's high frequency gain control pin Focus error bias control connect pin Logic DVEE power supply pin Poto-diode A & RF I/V AMP1 inverting input pin Description
5
S1L9224X01
VIDEO-CD 2ND GENERATION
Table 1. Pin Description(Continued) No. 66 67 68 69 70 71 72 73 74 75 Pin Name PDC PDB PDD F E PD LD VR VCC VISEL I/O I I I I I I O O P I Description Poto-diode C & RF I/V AMP1 inverting input pin Poto-diode B & RF I/V AMP2 inverting input pin Poto-diode D & RF I/V AMP2 inverting input pin Poto-diode F & tracking (F) I/V AMP inverting input pin Poto-diode f & tracking (E) I/V AMP inverting input pin APC AMP input pin APC AMP output pin (VCC+GND)/2 voltage reference output pin RF part VCC power supply pin Current, voltage pick-up select command inverting control pin (pull down) ex) Voltage type pick-up + command pull up current type pick-up composition Current type pick-up + command pull up voltage type pick-up composition RF summing AMP 3T boost's CAP connection pin (connected GND) RF summing AMP noise eliminating CAP connection pin (connected RFO) RF summing AMP inverting input pin RF summing AMP output pin RFO DC eliminating input pin (used in MIRROR, FOK pin)
76 77 78 79 80
BOOSTC2 RFL RFRFO IRF
I I I O I
6
VIDEO-CD 2ND GENERATION
S1L9224X01
MICOM COMMAND ($0X, $1X) Item Address Symbol Focus control Tracking control 0000 0001 D3 FS4 Focus on Anti-shock D2 FS3 Gain down Brake on Data D1 FS2 Search on TG2 Gain set D0 FS1 Search up TG1 Gain set FZC ATSC ISTAT Output
Tracking Gain Setting for Anti-Shock D7 D6 D5 D4 D3 Anti-Shock 0 0 0 1 0 Antishock off 1 Antishock on D2 Lens. Brake 0 Lens brake off 1 Lens brake on D1 TG2 (D3 = 1) 0 High freq. gain down 1 High freq. normal gain 0 Normal gain D0 TG1 1 Gain up ISTAT Output ATSC
Item
Hex TG2
AS = 0 TG1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 TG2 0 0 1 1 0 0 1 1 1 1 0 0 1 1 0 0
AS = 1 TG1 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0
Tracking gain control TG1, TG2 = 1 gain up
$10 $11 $12 $13 $14 $15 $16 $17
0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
$13, $17, $1B, $1F (AS0) $13, $17, $18, $1C (AS1) Tracking gain up at this time, MIRROR muting is off
$18 $19 $1A $1B $1C $1D $1E $1F
7
S1L9224X01
VIDEO-CD 2ND GENERATION
$2X D7 D6 D5 D4 D3 D2 D1 D0 ISTAT Output TM1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 TZC
Tracking Servo Mode 0 TM1 0 1 TM2 0 1 TM4 0 0 0 TM4 0 0 0 Sled. servo on Sled. servo off TM3 Track.kick 0 0 0 FWD. jump Jump off REV. jump Track. servo off Track. servo on 0 1 0 Mode $20 $21 $22 $23 $24 $25 $26 $27 $28 $29 $2A $2B $2C $2D $2E $2F TM7 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 TM6 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 TM5 1 1 0 1 1 1 0 1 1 1 0 1 1 1 0 0 TM4 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1
Sled Servo Mode TM3 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 TM2 1 0 1 1 1 0 1 1 1 0 1 1 1 0 1 1
TM3 Sled. kick 0 0 0 FWD. kick Kick off REV. kick
TM7 (Jump) 1 Lens brake on
8
VIDEO-CD 2ND GENERATION
S1L9224X01
Tracking Condition for DIRC (Direct 1 Track Jump) Item Hex DIRC = 1 TM 654321 Tracking mode $20 $21 $22 $23 $24 $25 $26 $27 $28 $29 $2A $2B $2C $2D $2E $2F 000000 000010 010000 100000 000001 000011 010001 100001 000100 000110 010100 100100 001000 001010 011000 101000 DIRC = 0 TM 654321 001000 001010 011000 101000 000100 000110 010100 100100 001000 001010 011000 101000 000100 000100 000100 100100 DIRC = 1 TM 654321 000011 000011 100001 100001 000011 000011 100001 100001 000011 000011 100001 100001 000011 000011 100001 100001
9
S1L9224X01
VIDEO-CD 2ND GENERATION
Register $3X
Address Focus Search D11 D15-D12 0011 D10 Sled Kick D9 D8 PS1 Kick+1 C1 Flag Output Defect Duty D7 DSPMC2 0 0 1 1 Initial 0 DSPMC 0 1 0 1 D6 State 0.45ms 0.54ms 0.63ms 0.73ms 1 0 0 0: Off 1: On
3TEQ
D5 Equalize 3T boost SW
Speak
D4 Peaking prevent standard freq. 0: 88kHz 1: 44kHz
PS4 PS3 PS2 Search+2 Search+1 Kick+2
MODEC Address D3 D15-D12 0011 EFM slice 0: Envel 1: Normal 1
ONOFF D2 Peaking prevent 0: Off 1: On 0
TOCD D1 Tracking offset adjust 0: Off 1: On 1
INT3 D0 Focus servo cpeak mute 0: Off 1: On 0
D3: Envelope EFM-slice or normal EFMslice select ELOCK H LOCK H: envelope converse D1: Tracking servo offset adjust select - TOCD: Tracking balance, gain offset adjust select Register reset command (0: reset, 1: reset cancel) Tracking servo offset a adjust. (0: no used, 1: used)
Initial
Select (Upper 8 bits out of 16 bits)
D7 0 D6 0 D5 1 D4 1 D3 D2 D1 D0 ISTAT SSTOP
Focus servo search level control PS4 Search + 2 PS3 Search + 1 $30 - $33 $34 - $37 $38 - $3B $3C - $3F S.X2, K.X2 $35
Sled servo kick level control PS2 Kick + 2 Kick Kick X1 X2 PS1 Kick + 1 $30, $34, $38, $3C $31, $35, $39, $3D $32, $36, $3A, $3E $33, $37, $3B, $3F S.X4, K.X4 $3F
Data mode (level)
Search X1 Search X2 Search X3 Search X4
Kick X3 Kick X4
Data
S.X1, K.X1 $30
S.X3, K.X3 $3A
10
VIDEO-CD 2ND GENERATION
S1L9224X01
Auto Sequence Mode Address 0 1 0 0 D3 0 0 1 1 1 1 0 D2 0 1 0 0 1 1 1 Data D1 0 1 0 1 0 1 0 D0 0 1 0: FWD 1: REV
Auto-sequence cancel Auto-focus 1-track jump 10-track jump 2N-track jump M-track jump Fast search
Speed Related Command ($FX) Address 1 x 1 speed x 2 speed 1 1 1 D3 0 0 D2 0 0 Data D1 0 1 D0 0 1
11
S1L9224X01
VIDEO-CD 2ND GENERATION
RAM Register Set
Item Address Blind A, E overflow. C Brake. B Fast Fast F K INI. Kick D FAST R $6XXX 1 11.6 ms 23.2 ms 0 5.80 ms 11.6 ms 1 2.90 ms 5.80 ms 0 1.45 ms 2.90 ms 8 4 2 1 5.8 ms INI. 2N TRA N M TRA. M Fast search T $7XXX $7XXX INI. Brake point P $BXXX INI. 0 4096 16384 0 16384 0 1 2048 8192 0 8192 0 1 1024 4096 0 4096 0 1 512 2048 0 2048 0 1 256 1024 0 1024 0 0 128 512 0 512 0 1 64 256 1 256 1 0 32 128 1 128 1 0 16 64 1 64 1 2.9 ms 0 8 32 1 32 0 1.45 ms 1 4 16 1 16 0 0.75 ms 0 2 8 1 8 0 $5XX D11 0.18 ms 0.36 ms 23.2 ms D10 0.09 ms 0.18 ms 11.6 ms D9 0.04 ms 0.09 ms 5.80 ms D8 0.02 ms 0.04 ms 2.90 ms 0.72 ms 1 0.36 ms 0 0.18 ms 0 0.09 ms 0 D7 D6 Data D5 D4 D3 D2 D1 D0
I/V 0: Voltage, 1: Current type T.RST 0: Reset cancel, 1: Reset Tracking servo offset
I/V SEL 0 T.RST adjust 0 EFMB C 0 FJTS 0
EFMBC: Double compensation of EFM ASY
1: Single (no used), 0: (used) FJTS: Fast search tracking mute 0: No used, 1: Used
PWM duty PD PWM width PW
NOTES: Actually count value can be a little error in fixed value. A fixed value + 4-5 WDCK B, D, E, fixed value + 3 WDCK C fixed value + 5 WDCK N, M, T, P fixed value + 3 TRCNT Warning 1. Out of the 16 settings, PWM width (PW) can select only one of 1, 2, 4, or 8 (not a 4-bit mixture) 2. When using a 2N track or an M track, more than 512 tracks is not recommended (potential for error within the algorithm) 3. There can be a 1-2 error in the WPM duty (PD), so set to fixed value + 2 4. $5XXXs I/V SEL command (0: pick-up configuration using voltage 1: current-type only) 5. T.RST: 0: Tracking servo offset DAC value RESET cancel 1: Tracking servo offset DAC value RESET 6. EFMBC: 0: Double ASY compen sation EFM slicer 1: Single ASY compen sation EFM slicer 7: FJTS: When fast search, tracking servo off mode
12
VIDEO-CD 2ND GENERATION
S1L9224X01
ABSOLUTE MAXIMUM RATINGS Item Supply voltage Operating temperature Storage temperature Permissible loss Symbol Vmax TOPR TSTG Pd - 20 - 55 Min Typ 5 25 25 150 70 150 Max Unit V C C mW
ELECTRICAL CHARACTERISTICS
Table 2. Electrical Characteristics No 1 2 3 4 5 6 7 7-1 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Item Supply current 6V Supply current 5V Supply current 4V RF AMP offset voltage RF AMP oscillation voltage RF AMP voltage gain EQ12 on flag EQ12 off flag RF RHD charac. RF AMP maximum output voltage RF AMP minimum output voltage 1X RF AC charac. 2X RF AC charac. Visel control register 1 Visel control register 2 RF IVSEL connection charac. AC RF IVSEL connection charac. BD RF IVSEL connection charac. AC2 RF IVSEL connection charac. BD2 Focus ERROR offset voltage Focus ERROR auto voltage Istat after febias adjust Focus ERROR voltage gain 1 Symbol ICCHI ICCTY ICCLO Vrfo Vrfosc Grf FLON FLOFF RFTHD Vrfpp1 Vrfpp2 RFAC1 RFAC2 RVISEL1 RVISEL2 RFSELAC RFSELBD RFSELAC2 RFSELBD2 VFEO1 VFEO2 VISTAT1 GFEAC Focus error AMP RF AMP Block Supply current Min 15 12 10 -85 0 16.2 0.85 3.8 0.00 0.00 35 35 35 35 70 70 -525 -70 4.3 18 Typ 40 32 25 0 50 19.2 1.00 1.50 1.25 55 55 55 55 110 110 -250 0 21 Max 60 50 40 +85 100 23.0 1.15 -15 5 2.0 2.0 4.0 85 85 85 85 160 160 -50 +70 24 Unit mA mA mA mV mV dB dB dB % V V kohm kohm kohm kohm kohm kohm mV mV V dB
13
S1L9224X01
VIDEO-CD 2ND GENERATION
Table 2. Electrical Characteristics(Continued) No 23 24 25 26 27 28 29 30 31 32 33 34 35 35-1 36 37 38 39 40 41 42 43 44 44-1 45 46 47 48 49 50 51 52 Item Focus ERROR voltage gain 2 Focus ERROR voltage gain difference Focus ERROR AC difference FERR maximum output voltage H FERR minimum output voltage L AGC max. gain AGC EQ gain AGC normal gain AGC compress ratio AGC frequency AGC level control 1 AGC level control 2 AGC level control 3 ARF2 on flag AFLON TERR gain voltage gain 1 TERR gain voltage gain 2 TERR gain voltage gain 3 TERR gain voltage gain 4 TERR gain voltage gain 5 TERR gain voltage gain 6 TERR gain voltage gain 7 TERR balance gain TERR balance mode 1 TERR balance mode 11 TERR balance mode 2 TERR balance mode 3 TERR balance mode 4 TERR balance mode 5 TERR balance mode 6 TERR EF voltage gain difference TERR maximum output voltage H TERR minimum output voltage L Symbol GFEBD CFE VFEACP VFEPPH VFEPPL GAGC GEQ GAGC2 CAGC FAGC AGCL1 AGCL2 AGCL3 RAGCF1 GTEF1 GTEF2 GTEF3 GTEF4 GTEF5 GTEF6 GTEF7 GTEE TBE1 TBE11 TBE2 TBE3 TBE4 TBE5 TBE6 GTEF VTPPH VTPPL Tracking error gain & balance RF AGC & equalizer Block Focus error AMP Min 18 -3 0 4.4 16 -1 3 0 -1.5 1.03 1.0 1.0 -0.1 -2 1 1 1 1 1 1 10.5 0.98 0.98 1.0 1.0 1.0 1.0 1.0 10.0 3.5 Typ 21 0 50 19 1 6 2.5 0 1.15 1.15 1.15 0 0.5 1.7 1.3 1.45 1.55 1.45 1.45 13.5 1.05 1.05 1.05 1.05 1.10 1.20 1.3 13.0 Max 24 +3 100 0.6 22.5 2 9.8 5 2.5 3 1.3 1.25 0.1 2 2.4 1.6 1.9 2.1 1.9 1.9 16.5 1.1 1.1 1.1 1.1 1.5 1.4 1.75 16.0 1.5 Unit dB dB mV V V dB dB dB dB dB dB dB dB V V
14
VIDEO-CD 2ND GENERATION
S1L9224X01
Table 2. Electrical Characteristics(Continued) No 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 Item APC PSUB voltage L APC PSUB voltage H APC NSUB voltage L APC NSUB voltage H APC PSUB voltage LDOFF APC NSUB voltage LDOFF APC current drive H APC current drive L MIRROR minimum operting freq. MIRROR maximum operting freq. MIRROR AM charac. MIRROR minimum input voltage MIRROR maximum input voltage FOK threshold voltage FOK output voltage H FOK output voltage L FOK freq. charac. Defect bottom voltage Defect cutoff voltage Defect minimum input voltage Defect maximum input voltage Normal EFM duty voltage 1 Normal EFM duty symmetry Normal EFM duty voltage 3 Normal EFM duty voltage 4 Normal EFM minimum input voltage Normal EFM duty difference 1 Normal EFM duty difference 2 Symbol APSL APSH ANSL ANSH APSLOF ANSLOF ACDH ACDL FMIRB FMIRP FMIRA VMIRL VMIRH VFOKT VFOHH VFOKL FFOK FDFCTB FDFCTC VDFCTL VDFCTH NDEFMN NDEFMA NDEFMH NDEFML NDEFMV NDEFM1 NDEFM2 Normal EFM slice DEFECT FOK MIRROR Block Automatic power control (APC) Min 3.8 3.8 4.0 2.5 30 1.8 -420 4.3 40 2.0 1.8 -50 0 0 -100 30 30 Typ 550 75 400 0.1 -350 670 4.7 0.3 0 5 +50 -50 50 50 Max 1.2 1.2 1.0 2.5 900 600 0.2 -300 0.7 1000 0.5 +50 10 +100 0 0.12 70 70 Unit V V V V V V V V HZ Khz HZ V V mV V V KHZ HZ KHZ V V mV % mV mV V mV mV
15
S1L9224X01
VIDEO-CD 2ND GENERATION
Table 2. Electrical Characteristics(Continued) No 81 82 83 84 85 86 87 88 88-1 88-2 88-3 88-4 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 Item ENV EFM duty voltage 1 ENV EFM duty voltage 2 ENV EFM duty symmetry ENV EFM duty voltage 3 ENV EFM duty voltage 4 ENV EFM duty voltage 5 ENV EFM duty voltage 6 ENV EFM minimum input voltage Double ASY method 1 Double ASY method 2 Double ASY method 3 Double ASY method 4 FZC threshold voltage Anti-shock detect H Anti-shock detect L TZC threshold voltage SSTOP threshold voltage Tracking gain win T1 Tracking gain win T2 Tracking gain win I1 Tracking gain win I2 Tracking BAL win T1 Tracking BAL win T2 VREG voltage Reference voltage Reference current H Reference current L Symbol EDEFMN1 EDEFMN2 EDEFMA EDEFMH1 EDEFMH2 EDEFML1 EDEFML2 EDEFMV DAM1 DAM2 DAM3 DAM4 VFZC VATSCH VATSCL VTZC VSSTOP VTGWT1 VTGWT2 VTGWI1 VTGWI2 VTGW11 VTGW12 VREG VREF IREFH IREFL Reference voltage Interface logic Double ASY method Envelope Block Envelope EFM slice Min -50 -50 0 0 +160 -100 -340 -350 150 -650 350 35 7 -67 -30 -150 200 100 250 150 -50 -40 3.20 -100 -100 -100 Typ 0 0 5 +50 +250 -50 -250 -250 250 -500 500 69 32 -32 0 -65 250 150 300 200 0 0 3.45 0 0 0 Max +50 +50 10 +100 +340 0 -160 0.12 -150 350 -350 650 100 67 -7 +30 -30 300 200 350 250 +50 +40 3.65 +100 +100 +100 Unit mV mV % mV mV mV mV V mV mV mV mV mV mV mV mV mV mV mV mV mV mV mV V mV mV mV
16
VIDEO-CD 2ND GENERATION
S1L9224X01
Table 2. Electrical Characteristics(Continued) No 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 Item F.Servo off offset F.Servo DAC on offset F.Servo auto offset F.Servo auto istat FERR febias status F.Servo loop gain F.Servo output voltage H F.Servo output voltage L F.Servo maximum output voltage H F.Servo maximum output voltage L F.Servo osillation voltage F.Servo feed through F.Servo search voltage H F.Servo voltage L Focus full gain F.Servo AC gain 1 F.Servo AC phase 1 F.Servo AC gain 2 F.Servo AC phase 2 F.Servo mutting F.Servo AC charac. 1 F.Servo AC charac. 2 F.Servo AC charac. 3 F.Servo AC charac. 4 F.Servo AC charac. 5 F.Servo AC charac. 6 T.Servo DC gain T.Servo off offset T.Servo DAC offset T.Servo on offset T.Servo auto offset T.Servo oscillation Symbol VOSF1 VOSF2 VAOF VISTAT2 VFEBIAS GF VFOH VFOL VFOMH VFOML VFOSC GFF VFSH VFSL GFSFG GFA1 PFA1 GFA2 PFA2 GMUTT GFAC1 GFAC2 GFAC3 GFAC4 GFAC5 GFAC6 GTO VOST1 VTDAC VOST2 VTAOF VTOSC Tracking servo Block Focus servo Min -100 0 -75 4.3 -50 19 4.4 3.68 0 +0.35 -0.65 40.0 19.0 30 14.0 30 0.75 0.68 0.60 0.68 0.94 0.73 12.5 -100 150 -350 -50 0 Typ 0 +250 0 0 21.5 +100 +0.50 -0.50 42.5 23.0 65 18.5 65 0.85 0.78 0.70 0.78 1.04 0.83 15.0 0 320 0 0 +100 Max +100 +500 +75 +50 24 0.75 1.32 +185 -35 +0.65 -0.35 45.0 27.0 90 23.0 90 -15 0.95 0.88 0.80 0.88 1.14 0.93 17.5 +100 550 +350 +50 +185 Unit mV mV mV V mV dB V V V V mV dB V V dB dB deg dB deg dB dB mV mV mV mV mV
17
S1L9224X01
VIDEO-CD 2ND GENERATION
Table 2. Electrical Characteristics(Continued) No 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 166-1 Item T.Servo ATSC gain T.Servo lock gain T.Servo gain up T.Servo output voltage H T.Servo output voltage L T.Servo maximum output voltage H T.Servo minimum output voltage L T.Servo jump H T.Servo jump L T.Servo DIRC H T.Servo DIRC L T.Servo output voltage L T.Servo AC gain 1 T.Servo AC phase 1 T.Servo AC gain 2 T.Servo AC phase 2 T.Servo full gain T.Servo AC charac. 1 T.Servo AC charac. 2 T.Servo AC charac. 3 T.Servo AC charac. 4 T.Servo AC charac. 5 T.Servo AC charac. 6 T.Servo loop mute T.Servo loop mute AC T.Servo INT mute M1 T.Servo INT mute M2 T.Servo INT mute M4 SL.Servo DC gain T.Servo FEED through SL.Servo DC lock SL.Servo lock 2 Symbol GATSC GLOCK GTUP VTSH VTSL VTSMH VTSML VTJH VTJL VDIRCH VDIRCL GTFF GTA1 PTA1 GTA2 PTA2 GTFG GTAC1 GTAC2 GTAC3 GTAC4 GTAC5 GTAC6 TSMUTE TSMTAC TSMTM1 TSMTM2 TSMTM4 GSL GSLF SLOCK SLOCK2 Sled servo Block Tracking servo Min 17.5 17.5 17.5 4.48 3.68 0.35 -0.65 0.35 -0.65 9.0 -140 17.5 -195 29.5 0.59 0.75 0.65 1.30 1.15 1.01 -250 0 0 0 0 20.5 0 20.5 Typ 20.5 20.5 20.5 0.5 -0.5 0.5 -0.5 12.5 -115 21.5 -135 32 0.69 0.85 0.75 1.35 1.25 1.11 0 +50 +50 +50 +50 22.5 +50 22.5 Max 23.5 23.5 23.5 0.52 1.32 0.65 -0.35 0.65 -0.35 -39 16.0 -90 25.5 -100 34.75 0.90 0.95 0.85 1.50 1.35 1.21 +250 +100 +100 +100 +100 24.5 -34.5 +100 24.5 Unit dB dB dB V V V V V V V V dB dB deg dB deg dB mV mV mV mV mV dB dB mV dB
18
VIDEO-CD 2ND GENERATION
S1L9224X01
Table 2. Electrical Characteristics(Continued) No 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 Item Sled forward kick Sled reverse kick Sled output voltage H Sled output voltage L Sled maximum output voltage H Sled minimum output voltage L SP.Servo 1X gain SP.Servo 2X gain SP.Servo output voltage H SP.Servo output voltage H SP.Servo maximum output voltage H SP.Servo minimum output voltage L SP.Servo AC gain 1 SP.Servo AC phase 1 SP.Servo SMEF gain SP.Servo AC gain 2 SP.Servo AC phase 2 Symbol VSKH VSKL VSLH VSLL VSLMH VSLML GSP GSP2 VSPH VSPL VSPMH VSPML GSPA1 PSPA1 GSMEF GSPA2 PSPC2 Spindle servo Block Sled servo Min 0.38 -0.75 4.48 3.68 14.0 19.0 4.48 3.68 -7.0 -120 13.0 -3.0 -120 Typ 0.60 -0.60 16.5 23.0 -3.5 -90 16.5 9.0 -90 Max 0.75 -0.38 0.52 1.32 19.0 27.0 0.52 1.32 0 -60 20.0 12.5 -60 Unit V V V V V V dB dB V V V V dB deg dB dB deg
19
S1L9224X01
VIDEO-CD 2ND GENERATION
AUTO-SEQUENCE
This feature automatically carries out the following commands: Auto-focus, track jump, and move. During autosequence, it latches the data when MLT is L, and outputs H when ISTAT is L and at the end. AUTO FOCUS Flow CHart
Auto Focus
Focus Search UP
FOK = H YES FZC = H YES FZC = L YES Focus Servo ON
NO
NO
Repeat this action during blind "E" time set by register 5, until FOK and FZC are both "H"
NO
END
Timing Chart The auto-focus carries out the focus search up by receiving the auto-focus command from micom in focus search down status. SSP is focus servo on when the internal FOK and FZC satisfy the all H time set blind E (register $5X) and transfer FZC to L. Then the internal auto-focus is finished, and transmitted to MICOM through the ISTAT output.
$47 Latch MLT FOK
Blind Time E FOK, FZC -> H
FZC
Focus Output
Search UP Search DOWN
Focus Servo ON
ISTAT Internal Status $02 $03 $03 $03 $08
20
VIDEO-CD 2ND GENERATION
S1L9224X01
1 TRACK JUMP {$48 (FWD), $49 (REV)} Flow-Chart
1 Track Jump
Track Jump Sled Servo OFF
$48: Foward jump $49: Reverse jump Wait using the WDCK standard clock for blind "A" time, set by register 5. (1 WDCK = 0.011ms)
NO
WAIT (Blind A)
Trcnt = YES Track REV Jump
Repeat checks if TRCNT is continuously "H" at rising edge of WDCK, during blind time "B" set by register 5.
WAIT Brake "B"
Track, Sled Servo On
END
Timing Chart Track Jump is carried out after receiving $48 ($49), and the blind time and the brake time is set by register $5X.
$48 ( $49) MLT TRCNT
Blind Time A Wait Blind Time B Trcnt H Continuity Time
Tracking Farward Jump
Track Output Sled Output ISTAT Internal Status
Track Servo ON Sled Servo ON Sled Servo OFF
Track Servo ON Tracking Revrese Jump Sled Servo ON
$25
$28 ($2C)
$28 ($2C)
$2C ($28)
$25
NOTE: Inside () means reverse.
21
S1L9224X01
VIDEO-CD 2ND GENERATION
10 TRACK JUMP {$4A (FWD), $4B (REV)} Flow-Chart
10 Track Jump
Track FWD Jump Sled FWD Kick
$4A: Foward jump & kick $4B: Reverse jump & kick Wait using the WDCK standard clock for blind "A" time, set by register 5. (1 WDCK = 0.011ms)
NO
WAIT (Blind A)
Trcnt = 5 YES Track REV Jump, Sled FWD Kick
$4A: Tracking REV jump & sled FWD kick $4B: Tracking FWD jump & sled REV kick
NO
C = Over Flow? YES Track, Sled Servo ON
Repeat check the TRCNT 1 period using the WDCK standard clock to see if it is longer than the overflow C time set by register 5.
END
Timing Chart {$4A(FWD), $4B(REV), inside () is Reverse} 10 track jump carries out tracking forward jump until the trcnt 5 track count. It carries out tracking reverse jump until one period of trcnt is longer than the overflow C select time, then turns the tracking servo and sled servo on. This function is to check if the actuator speed is enough to turn the servo on.
$4A ( $4B) MLT TRCNT
Blind Time A WAIT Trcnt 5 Count Over Flow Time C Trcnt 1's Time Check Track Servo ON Tracking Revrese Jump Sled Forward Kick Sled Servo ON
FWD REV
Tracking Forward Jump
Track Output Sled Output ISTAT Internal Status
Track Servo ON Sled Servo ON
$25
$2A ($2F)
$2A ($2F)
$2E ($2B)
$25
22
VIDEO-CD 2ND GENERATION
S1L9224X01
2N TRACK JUMP Flow-Chart
2N Track Jump
Track FWD Jump, Sled FWD Kick
$4C: Foward jump & kick $4D: Reverse jump & kick Wait using the WDCK standard clock for blind "A" time, set by register 5. (1 WDCK = 0.011ms)
NO
WAIT (Blind A)
Trcnt = N? YES Track REV Jump, Sled FWD Kick C = Over Flow? YES WAIT (Kick "D") Track Servo ON, Sled FWD Kick Tracking & Sled Servo ON
$4C: Tracking REV jump & sled FWD kick $4D: Tracking FWD jump & sled REV kick
NO
Repeat check of TRCNT 1 period using the WDCK standard clock to see if it is longer than the overflow C time set by register 5. $4C: Sled FWD kick is continuously executed for kick "D" time $4D: Sled REV kick is continuously executed for kick "D" time
END
23
S1L9224X01
VIDEO-CD 2ND GENERATION
2N TRACK JUMP {$4C(FWD), $4D(REV), INSIDE () IS REVERSE} Timing Chart
$4C ( $4D)
MLT TRCNT
Blind Time A Trcnt N Count C Overflow Time C, Check Trcnt 1 Period Track Servo ON Revrese Jump Sled Forward Kick During D Time, Sled FWD Kick D Q Data Read Possible Sled Servo ON FWD REV
Tracking Forward Jump
Track Output Sled Output
Track Servo ON
Sled Servo ON
ISTAT Internal Status
$25+$17
$2A ($2F)
$2A ($2B)
$2E ($2B)
$26 ($27)
$25+$18
Similar to 10 track. Kick D time is added to the sled kick and carried out. Servo is turned on after lens brake execution.
24
VIDEO-CD 2ND GENERATION
S1L9224X01
M TRACK JUMP {$4E(FWD), $4F(REV)} Flow-chart
M Track Move
Track Servo OFF, Sled FWD Kick
$4E: Foward jump & kick $4F: Reverse jump & kick Wait using the WDCK standard clock for blind "A" time, set by register 5. (1 WDCK = 0.011ms)
NO
WAIT (Blind A)
TRCNT = M? YES Tracking & Sled Servo ON
Count M of Trcnt set by register 7.
END
Timing Chart {$4E(FWD), $4F(REV), inside () is Reverse}
$4E ( $4F) MLT TRCNT
Blind Time A Trcnt M Count Track Servo ON Tracking Servo OFF Treck Servo ON
FWD REV
Track Output
Sled Output
Sled Servo ON
Sled Forward Kick
Sled Servo ON
ISTAT Internal Status $25 $22 ($23) $22 ($23) $22 ($23) $25
Sled kick is carried out by counting Trcnt for the set M count value set by register 7, using the clock.
25
S1L9224X01
VIDEO-CD 2ND GENERATION
FAST SEARCH Flow-Chart
Fast Search
Track Servo ON, Sled FWD Kick WAIT (Blind F)
$44: Foward jump & kick $45: Reverse jump & kick
Track FWD Jump, Sled FWD Kick WAIT (Blind K)
$44: Tracking FWD jump & sled FWD kick $45: Tracking REV jump & sled REV kick
Trcnt = P? YES Track FWD Jump, Sled FWD PWM Kick
NO
Count P of Trcnt set by register 7. Repeat checks Trcnt, until Trcnt equals T set by register 7, like the PD and PW set by register 6, PWMs duty is decided with the PWs PWM1 period width used as the period, and PDs high. Low duty used as standard 4 bits (number selected from 0 - 15) $44: Sled REV kick is continuously executed for kick "R" time $45: Sled FWD kick is continuously executed for kick "R" time
Trcnt = T? YES Track Servo ON, Sled REV Kick WAIT (REV. Kick "R") Tracking & Sled Servo ON END
NO
26
VIDEO-CD 2ND GENERATION
S1L9224X01
Timing Chart
$44 ( $45) MLT TRCNT
Blind Time F Blind K
$5XX1 Tracking Servo Mute
FWD REV
Trcnt P Count Trcnt T Count Kick "R"
Track Output
Sled Servo ON
Tracking Forward Jump Sled Servo PWM Cont
Track Servo ON
Sled Output
Sled Servo ON
Sled Forward Kick
Sled REV Kick
Sled Servo ON
ISTAT Internal Status $25+$27 $26 ($27) $2A ($2F) $26 ($27) $25+$18
Suggestions for Using Auto-Sequence * * * * * * * * Tracking gain up and brake on ($17) must be transmitted when carrying out 1, 10, 2n, track jump, and fast search. The entire auto-sequence modes MLT becomes L, and the sequence process is carried out at the initial WDCK falling edge after data latch. Please JUDGE play status not by Istat, but by FOK and GFS. Tracking gain up, brake, anti-shock and focus gain down are not carried out in auto-sequence, and needs a separate command. If the auto-sequence does not operate as Istat max time over, apply $40 and clear the Ssps internal status, then try again. The WDCK mentioned above is input from DSP as 88.2kHz (2x 196kHz). Also, it is possible to choice 3 mode (88, 176, 500kHz) by DSP command setting. 2N and M track have the potential for errors within the algorithm, when jumping more than 512 tracks, so please TRY to limit use for track jumps within 512. Please limit the use of the fast-search algorithm for more than 512 tracks.
27
S1L9224X01
VIDEO-CD 2ND GENERATION
AUTOMATIC ADJUST COMMAND
Tracking Balance, Gain Adjust
Address (13bit command) Tracking balance $80XX - $81XX Initial value Address D8 0 D7 0 D6 0 D5 B5 0 D4 B4 1 D3 B3 1 Data D2 B2 1 D1 B1 1 D0 B0 1 BAL TRCNT Istat Trcnt
Address (12bit command) Tracking gain $81XX - $83XX Initial value
Address D7 0 D6 0 D5 0 D4 G4 1 D3 G3 0 D2 G2 0
Data D1 G1 0 D0 G0 0
Istat
Trcnt
TGH
TGL
Tracking Balance, Gain Adjust Window
Address D3 $84XX Tracking gain adjust window trcnt: ISTAT 0-250mV: 200mV 1-150mV: 300mV 0 D2 Tracking balance adjust window 0: -10mV-15mV 1: -20mV-20mV 0 Data D1 Focus. servo offset adjust 0: Off 1: On 0 D0 Fe.bias offset adjust 0: Off 1: On 0 $841 (F.ERR) $842 (F.SER) TRCNT ISTAT TRCNT
Initial value
APC (Automatic Power Control)
Address D7 LDON $85XX D6 PNSEL D5 INTC2 D4 INTC Data Tracking S. Window Mute (88.2kHz) 11kHZ - 0.7kHZ CPEAK (RF) 5.5kHz - 0.7kHz 2.7kHz - 0.7kHz 0 0 D3 FLAGSEL 0: Hard control 1: Micom data D2 FLAGCON Micom data 0: Flag SW-on 1: Hflag SW-off 1 D1 FLAGINV 0: FALGB H: SW on 1: FLAG H: SW off D0 CLOCK 0: Lock =1 internal lock = 1 1: Lock (0,1) 1
APC On/off APC P/N 0: APC on sel 1: APC off 0: PSUB 1: NSUB
0 1 0 1
0 0 1 1
Initial Value
1
0
0
1
28
VIDEO-CD 2ND GENERATION
S1L9224X01
Register Set 1
Address D7 F.SER.RE SEL $84XX Focus servo offset adjust reset 0: Reset 1: Reset cancel 1 D6 FOKSEL Trcnt output sel (monitor:1) except for gain control ($82x-$83x) 0: FOK 1: TRCNT 1 D5 MONITOR Trcnt monitor select 0: Test output 1: FOK, TGL, Trcnt Data D4 FSOC FERR. offset focus offset adjust step time setup 0: 46.0ms 1: 5.80ms 1 D3 DSP4 92.87ms D2 DSP3 46.4ms D1 DSP2 23.2ms D0 DSP1 11.6ms
Initial V.
1
0
1
0
1
TRCNT select is chosen by the MONITOR(D1), TGL is output when tracking gain adjust command ($82X-$83X) is given. Others when FOKSEL is "0", FOK is output to the TRCNT pin, when "1" COUT is output. DSP4 - DSP1: Flag hold time converse by total 16 steps. Default: 0101 (58ms)
Register Set 2
Address D7 DIRCI $87XX DIRC 0, 1 control D6 RSTF FEBIAS reset 0: Reset 1: Reset cancel D5 AGCL1 D4 AGCL2 Data D3 ELOCK 0: Off 1: On Envelope lock = 1 mode conversion D2 MT0 0 0 0 0 1 1 1 1 Initial V. 1 1 1 1 0 1 D1 MT1 0 0 1 1 0 0 1 1 1 D0 MT2 0 1 0 1 0 1 0 1 1 - CPEAK FSCMPO BALH C1flag DFCINT FECMPO BALL LOVKG
AGC gain adjust D5 D4 0 0 1.6V 0 1 1.45V 1 0 1.25V 1 1 1.0V
29
S1L9224X01
VIDEO-CD 2ND GENERATION
Register Set 3
Address D7 EC8 $8EXX Track. servo freq. move EC7 EC8 0 0 1 0 0 1 1 1 0 D6 EC7 Track. servo freq. move freq. 1.2K 1.3K 1.4K 1.5K 0 D5 EC6 Track. servo phase shift on/off 0: Off 1: On D4 EC5 Track. servo gain shift on/off 0: Off 1: On Data D3 EC4 Focus. servo freq. move EC4 EC3 0 0 1 0 0 1 1 1 0 D2 EC3 Focus. servo freq. move freq. 1.2K 1.3K 1.4K 1.5K 0 D1 EC2 Focus. servo gain shift on/off 0: Off 1: On D0 EC1 Focus. servo phase shift on/off 0: Off 1: On 0 -
Initial V.
0
0
0
Register Set $8FXX - Tracking GServo offset adjust command
Address D7 TEST $8FXX FOK defect mirror output on/off 0: On 1: Off D6 EC10 Front ASY gain 0: 1x 1: 2X D5 EC9 ENVELOPE gain sel 0: 2x 1: 1.5x Data D4 TOA4 D3 TOA3 D2 TOA2 D1 TOA1 D0 TOA0 -
Tracking servo offset adjust command 8F (001XXXXX) $8F3F $8F20 (-160mV +160mV) Adjustment window used by balance window istat output monitor - Tracking offset value (+30mV - +50mV) is iedal system. After offset (0mV), adjust ($8F3F $8F20) upper 3-5 step. Consider what to set. 1 0 0 0 0
Initial V
0
0
0
30
VIDEO-CD 2ND GENERATION
S1L9224X01
TRACKING BALANCE ADJUST CONCEPT
The tracking balance adjust automatically adjusts using the following process: The tracking error DC offset extracted from the pre-set DC voltage window level, and the external LPF are comparison monitored by MICOM.
F 69 F beam E 70 E beam Gain Adjust 6 bit Array I/V Amp I/V Amp
RHI Vdc + + RLI
RHO TBAL RLO
AND Logic
30
ISTAT To MICOM
MIRROR TZC
D CK
Q
29
TRCNT
6 bit (B5-B0) from MICOM LPF
Process Summary Tracking balance adjust is accomplished in the following manner: With the focus on and spindle servo on, the tracking and sled servo loop is turned off to make the tracking loop into an open loop. The error signal which has passed through the wide-range pick-up and the tracking error amp, passes through the external LPF to extract the DC offset. The DC offset is compared with the pre-selected window comparator level to extract the tracking error amps DC offset within the window, to inform MICOM using the ISTAT that the balance adjust is complete. At this time, Tracking E beam-side I/V amps gain is selected by MICOM, and the 6-bit resistance arrays resistance value is selected by the 6-bit control signal. The values that MICOM applies are 000000 111111. If you select the switch, TE1s DC offset increases the (2.5V-V) (2.5V + V) one step at a time, to enter the pre-selected DC window level. When it enters that level, the balance adjust is completed, and the switch condition is latched at this time. In this adjust process, the TE1 signals frequency distribution is from DC to 2kHz, so if DC components are included, the DC offset which passed LPF are not accurate DC values. Therefore, if the frequency of the TE1 signal is above 1kHz, MICOM monitors the window comparator output. The frequency check at this time monitors the trcnt pin. Balance adjust completes the adjustment when the TBAL output is H. Vdc < RLI < RHI RHO RLO TBAL (AND gate) H L L RLI < Vdc < RHI H H H RLI < RHI < Vdc L H L
31
S1L9224X01
VIDEO-CD 2ND GENERATION
* * * *
RHI: High level threshold value RLI: Low level threshold value Vdc: Window comparator input voltage TBAL: Window comparator outputs and gate output value
Tracking Balance Adjust Example Out of $80000 $81F80 128 steps, the 88 steps excepting the upper and lower 20 steps, are used ($80400$81A80). The limit adjust flow applies the gain to $830 at the focus, tracking on point, and checks the TRCNTs frequency. Check if 7 TRCNT came in during 10 ms, and if the answer is YES, check ISTAT, and if NO, repeat the TRCNT number check 3 times, then go to ISTAT Check. If the 3x repeat fails as well, increase the balance switch one step. Also, just in case ISTAT does not immediately go to H when ISTAT checking, wait 10ms. Check if it is H after the 3x repeat, and if not, increase the balance switch one step. Adjust the wait mentioned above 10ms, when the system is running. Average the values found by repeating the balance adjust three times. If only two out of the three tries were successful in getting a balance value, average the two values. Set as balance switch, this average value, +2. This is because the balance for the system and the minus value for the DC is stable in the system. Precision is important in balance adjust, and about 1-2 sec is spent as adjust time, which is accounted for.
32
VIDEO-CD 2ND GENERATION
S1L9224X01
Balance Adjust Flowchart 1
Start: $804
Other Method - Can balance adjust while in track move. - Trcnt freq. check is easy in $F3 apply 2x mode. -10mV - +15mV $84 X0XX -20mV - +20mV $84 X1XX Most select is 20mV
- Environment Setting Focus on $08 Spindle on CLV-S Tracking off $20 Sled off gain $830 Balance Window Level Seting
3times repeat. If failure again after 3 tries, switch cahnge.
NO
B0 to B5 switch control. 1step increase from $80400 to $81A80
NO
Trcnt = 7? During 10ms
YES
ISTAT = H?
YES
After 10ms wait, 3times repeat check to see if 10ms ISTAT = "H". If failure again after 3 tries, switch cahnge.
After current adjust value +2 step, Adjust Complete END
Repeat balance ADJ 3times and average the thricerepeated balance switch value to set the balance switch. If only 2 repeats out of 3 is OK, take the average of 2 repeats.
33
S1L9224X01
VIDEO-CD 2ND GENERATION
Balance Adjust Flowchart 2
Start: $800 Other Method - Can balance adjust while moving in track move. - Trcnt freq. check is easy in $F3 apply 2x mode. -10mV - +15mV $84 X0XX -20mV - +20mV $84 X1XX Environment Setting - Focus on $08 - Spindle on CLV-S - Tracking off $20 - Sled off gain $830 Balance Window Level Seting
B0 to B5 Switch Control. 1 step increase from $80000 to $81F80
NO
Trcnt Freq is High Enough?
YES
NO
1kHz Check
ISTAT = H?
YES
END
When Executing Tracking Balance Adjust * * * * * The balance adjust is from $80000 to $81F80, and the switch mode is changed one STEP at a time by 13-bit data transmission. After adjust is completed, a separate latch pulse is not necessary. If the trcnt freq. is not high enough, the balance can be adjusted at $F3 applied 2x mode. Here, we have suggested tracking off status for the balance adjust, but the same amount of flow can be balance adjusted while in track move. The tracking balance window select level can be selected by D2 bit out of 12-bit data. 0: -10mV - +15mV, 1: -20mV - +20mV. When the tracking balance adjust is complete, start the tracking gain adjust.
34
VIDEO-CD 2ND GENERATION
S1L9224X01
Tracking Balance Equivalant register
Tracking Balance TE1 offset Fixed R and Parallel R Value E R Equ. 531K 523.6K 515K 507.5K 500.5K 492.5K 484.8K 477.1K 467.5K 459.7K 451K 444.8K 437K 429.4K 422K 413.5K 398.4K 391.6K 383.8K 376K 368.6K 360.8K 353K 345K 336K 327.9K 320K 312K 305K 297K 289K 282K 75K // 5bit R 6.29K 6.47K 6.68K 6.89K 7.09K 7.33K 7.58K 7.85K 8.21K 8.52K 8.88K 9.21K 9.62K 10.0K 10.5K 11.0K 12.2K 12.9K 13.7K 14.6K 15.6K 16.8K 18.2K 19.8K 22.3K 24.8K 27.9K 32.1K 37K 44.6K 55.9K 75K 5bit Equ. 6.87K 7.09K 7.33K 7.58K 7.84K 8.12K 8.44K 8.77K 9.22K 9.62K 10.1K 10.5K 11.0K 11.6K 12.2K 13K 14.6K 15.6K 16.8K 18.2K 19.7K 21.6K 24K 27K 31.7K 37.1K 44.6K 56K 73.3K 110K 220K 0K Variable Resistor (5bit)
DATA $800 $801 $802 $803 $804 $805 $806 $807 $808 $809 $80A $80B $80C $80D $80E $80F $810 $811 $812 $813 $814 $815 $816 $817 $818 $819 $81A $81B $81C $81D $81E $81F
F Eqa. 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K 391K
13K 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
27K 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
56K 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
110K 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
220K 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 252K
Note 13K
252K F Equivalent Resistor
2 6K
6.8K
E Equivalent Resistor
5bit
1) 220K//110K=73.33K 2) 56K//27K=18.21K 3) 27K//13K=8.775K 4) 110K//56K=37.10K 5) (1)//(2)=14.58K 6) (3)//(4)=7.09K 7) 56K//13K=10.55K 8) (1)//(7)=9.223K 9) 56K//220K=44.63K A)56//110/220=31.74K B)13//56//110=9.62K C)(1)//27K=19.73K D)27K//110K=21.67K E)27K//220K=24.04K
35
S1L9224X01
VIDEO-CD 2ND GENERATION
GAIN ADJUSTMENT
F 69 F beam E 70 E beam I/V Amp Controlled by 6 bit switch (B5-B0) from MICOM I/V Amp Resistance Array
GHI Vdc + + GLI TGL TGH
AND Logic
TGO 30 ISTAT To MICOM
29
TRCNT
TE1 LPF
LPFT
TE2
1 K, 103
Process Summary The signal TE1 output by the tracking error amp outputs resistance divide (DC+AC) passes through LPF and the DC offset extract signal (DC) difference AMP. Only pure AC components are compared with the pre-selected window comparators gain select value to carry out the tracking gain adjustment. The resistance divide changes the 5-bit resistance combination with the MICOM command, to change the gain. tracking gain adjustment is carried out in the same conditions as balance adjustment, which is: focus loop on, spindle servo on, tracking servo off and sled servo off. It adjusts the tracking error amps gain and the wide-rage Pick-ups amount of reflection. The external LPFs cut-off frequency is set to 10Hz - 100Hz. The window comparators comparison level can be chosen from +150mv - +300mV, and +250mV - +200mV by MICOM command. TGL outputs +150mV and +250mV comparator output to TRCNT. TGH outputs +300mV and +200mV comparator output to ISTAT. Vac < GLI < GHI TGH (ISTAT output) TGL (TRCNT output) H L GLI < Vac < GHI H H GLI < GHI < Vac L H
Gain Adjustment is complete when the output is H.
36
VIDEO-CD 2ND GENERATION
S1L9224X01
1 Window Input GHI GLI
2
3
Vac
TGH (pin30)
TGL (pin29)
When Adjusting the Tracking Gain * * * * In gain adjustment, the switch mode is changed one step at a time from $83F $820 by 12-bit data transmission. A separate latch pulse is not needed after adjust completion. Trcnt and TGAL outputs H duty check standard is above 0.1ms. Adjustment is carried out by choosing the most appropriate out of the 4 adjustment modes, including the ones listed above. The tracking balance window select level can be selected by the D3 bit out of the 12-bit data. 0: +250mV (TGL) - +200mV (TGH) 1: +150mV (TGL) - +300mV (TGH) When tracking gain adjustment is complete, tracking & sled servo loop on and TOC read is initiated.
*
37
S1L9224X01
VIDEO-CD 2ND GENERATION
Start: $83F - Environment Seting Focus on $08 Spindle on Tracking off $20 Sled off Balance Window Level Seting
If gain adjusting after balance adjustment, separate environment settings are not needed. -150mV - +300mV $84 1XXX +250mV - +200mV $84 0XXX
G0 to G4 Switch Control. 32 step decrease from $83F to $820
NO
Trcnt = H?
YES
END
Gain adjust proceeds from status 1 2 3 when the MICOM command carries out down command from $83F $820, in order. Adjustment is complete when in status 2. Gain Adjustment Method 1 MICOM monitors trcnts TGL output, and if the outputs H duty (0.1ms) is detected, the adjustment is complete. At this time, the window comparator level is +150mV - +300mV. Gain Adjustment Method 2 MICOM monitors ISTATs TGO output, and if the outputs H duty (0.1ms) is detected, the adjustment is complete. At this time, the window comparator level is +150mV - +300mV. Gain Adjustment Method 3 MICOM monitors Trcnts TGL output, and if the outputs H duty (0.1ms) is detected, the Window Comparator Level is changed from +150mV - +300mV to +250mV - +200mV. And when MICOM again monitors Trcnts TGL output and the outputs H duty (0.1 ms) is detected, the adjustment is complete. If you latch the former MICOM command value and the latter MICOM command values median, it is possible to Gain adjust +200mV. Gain Adjustment Method 4 MICOM monitors Trcnts TGL output, and if the outputs H duty (0.1ms) is detected, MICOM command goes 1 step down, and adjustment is completed. At this time, the window comparator level is +150mV - +300mV. Gain Adjustment Method 5 Gain adjustment is set to a total of 32 steps, and gain window is set to +250mV. That is, the process starts at $83F and carries on to $820. It first sets $83F, monitors the Trcnt pin and checks if 5 Trcnt were detected during 10ms. If YES, adjustment is complete, and if NO, carry on lowering the gain switch 1 step at a time. Repeat the above process three times and set the gain adjustment switch with the average value.
38
VIDEO-CD 2ND GENERATION
S1L9224X01
Gain Adjustment Flowchart 2
Start: $83F - Environment Seting Focus on $08 Spindle on Tracking off $20 Sled off Balance Window Level Seting
If gain adjusting after balance adjustment, separate environment settings are not needed. -150mV - +300mV $84 1XXX +250mV - +200mV $84 0XXX
G0 to G4 Switch Control. 32 step decrease from $83F to $820
NO
5 Trcnt During 10ms?
YES
Average the 3 repeat executions, then gain switch setting
END
39
S1L9224X01
VIDEO-CD 2ND GENERATION
Tracking Gain Equivalant Resistance
Tracking Gain Data $83F $83E $83D $83C $83B $83A $839 $838 $837 $836 $835 $834 $833 $832 $831 $830 $82F $82E $82D $82C $82B $82A $829 $828 $827 $826 $825 $824 $823 $822 $821 $820 TERR Tot. Gain 0.108 0.303 0.419 0.575 0.699 0.798 0.876 0.981 1.048 1.139 1.195 1.273 1.321 1.389 1.431 1.490 1.52 1.618 1.676 1.755 1.800 1.8675 1.907 1.961 1.994 2.040 2.069 2.108 2.133 2.167 2.188 2.219 96K / 32K -> 3.0 Times 0.506 0.539 0.558 0.585 0.600 0.622 0.635 0.653 0.664 0.680 0.689 0.702 0.711 0.722 0.729 0.739 5.23K 5.23K 5.23K 5.23K 5.23K 5.23K 5.23K 5.23K 5.23K 5.23K 5.23K 5.23K 5.23K 5.23K 5.23K 5.23K 5.375K 6.125K 6.625K 7.375K 7.875K 8.625K 9.125K 9.875K 10.375K 11.125K 11.625K 12.375K 12.875K 13.625K 14.125K 14.875K 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 TERR Gain 5bit Gain Compared Combination Ratio 0.036 0.101 0.139 1.191 0.233 0.266 0.292 0.327 0.349 0.379 0.398 0.424 0.440 0.463 0.477 0.496 Value 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K Value 0.375K 1.125K 1.625K 2.375K 2.875K 3.625K 4.125K 4.875K 5.375K 6.125K 6.625K 7.375K 7.875K 8.625K 9.125K 9.875K 5.0K 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 5.0K 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 2.5K 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1.25K 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0.75K 1 0 1 0 1 0 1 0 1 0 1 0 1 0 The GAIN ratio 1 0 is calculated in the TE1 pin. Note
40
VIDEO-CD 2ND GENERATION
S1L9224X01
Example of System Control Program
Disc Change
Power ON CLOSE
Disc Tray Check OPEN Replay TIME Loading
100ms Maximum
Focus Error Febias Automatic Control Start $8780+$87F0+$841 transfer
After 100ms ISTAT L -> H?
100ms Maximum
Focus Offset Cancel Automatic Control Start $08+$867+(200ms walt)+ $86F+$842 transfer
After 100ms ISTAT L -> H?
Tracking Offset Cancel Start $8F1F -> $8F00 (ISTAT->H) Transmission Laser Diode ON LD ON, P-SUB $8560 Limit SW Check
2s Maximum
Focusing Auto-Focusing $47 Transmission NO Focus OK? FOK H? NO TRY Count 3? YES Laser OFF $85C0 Transmission Display (no disc) Tracking Balance Adjust Standby Tracking Gain Adjust
YES Spindle Servo Loop ON Tracking & Sled Loop OFF $20 Transmission
300ms Maximum
TOC Read OK? PASS Disc 8/12Cm Check Play Back
FAIL
Laser OFF $85C0 Transmission Display (error), TRAY Open Standby
41
S1L9224X01
VIDEO-CD 2ND GENERATION
FEBIAS OFFSET ADJUST
164 K 32 K
vb va
32 K
59
FE1
+
160 K
sev_stop FEbias 63
4K X1 X2 X4 X8 X16 3K
+
+
vc
fcmpo
MICOM sends the febias offset adjust command $841 to start the adjustment. In the focus error amp final output block, the focus output is compared with the 1/2 VDD. If the focus error amp output goes above 1/2 VDD, the Febias offset adjust is completed. The focus offset adjusts voltage change per step is about 17mV. Transition is carried out 1 step at a time from 112mV to -112mV by the total 5-bit resistance DAC, and after completion, about 8mV of offset is added to 1/2 step. Normally, the offset distribution after febias offset adjust is between -8mV +8mV. The design is such that after focus offset, you have the option to vary the febias by turning on the switch that connects the exterior and interior of the febias block (pin 63). This control signal is Sev_stop, and it is switched on after focus servo offset adjust. When febias block is open, the focus error offset remains unchanged, the same as febias adjust offset. The time spent per step is 5.8ms, and since there are 5 bits, a total of 32 steps and maximum 256 ms can be spent. The adjustment is carried out by hardware, and it transitions from minus offset to plus offset. For febias offset readjust, 4-bit DAC is reset by $8780, and reset can be canceled only when the $87F0-applied D2 bit goes from 0 1. In order to prevent system errors such as static electricity, the febias DAC latch blocks reset is not carried out by the RESET block (System Reset), but by MICOM data.
42
VIDEO-CD 2ND GENERATION
S1L9224X01
FEbias Offset Setting
* Application when adjusting offset from 0mV - +100mV
VDD (5 V)
* Application when adjusting offset from -100mV - 0mV
FEBIAS
Rx
FEBIAS
4K
Optional Offset Voltage (Voff)
Rx
Rx
VDD/2
VDD/2
VDD - VDD/2 ( Rx + 4 K )
= Voff
Example) When Power is 5 V ( 5 - 2.5 ) V ( Rx + 4 K ) 4 K = Voff 10 K ( Rx + 4 K ) = Voff
43
S1L9224X01
VIDEO-CD 2ND GENERATION
FOCUS OFFSET ADJUST
FSET 13 FEO 47 VC 3.6K 60K
+ +
to Digital
FZCI 20K 48K Focus Phase Compensation FS2B 470K 47K PS 4 3 0 1 0 1 82K 40K
+
FSI 58 470K FDFCT 60 DFCTI
+
48 FEO
FS4B
FGD 27 46K FS3 580K FS3
10K 50K
+ -
5K FS1
FGD 26
X1 X2 X3 X4 25 FLB
0 0 1 1
10 FRCH
MICOM sends the focus offset adjust command $842 to start the adjustment. In the focus error amp final output block, the focus output is compared with the 1/2 VDD. If the focus error amp output goes above 1/2 VDD, the focus offset adjust is completed. The focus offset adjusts voltage change per step is about 40mV. Transition is carried out 1 step at a time from 320mV to - 320mV by the total 4-bit resistance DAC, and after completion, about +20 MVDML of Offset is added to 1/2 step. Normally, the Offset distribution after Focus Offset adjust exists between -20mV +20mV. The design is such that after focus offset, you have the option to vary the focus by turning on the switch that connects the exterior and interior of the focus block (pin 63). When febias block is open, the focus error offset is the same as febias adjust offset. The time spent per step is 5.8ms, and since there are 4bits, a total of 16 steps and maximum 128ms can be spent. Also, lens-collision-sounds can be generated when adjusting the pick-up with a sensitive focus actuator, so the time division that uses 46ms per step, spending a total of 736ms, is used. That is carried out by setting the $86Xs lowest D0 bit to 0. The adjustment is carried out by hardware, and it goes from minus offset to plus offset. for febias offset readjust, 4-bit DAC is reset by $867, and reset can be canceled only when the $86F-applied D2 bit goes from 0 1. In order to prevent system errors such as static electricity, the focus DAC latch blocks reset is not carried out by the RESET block (System Reset), but by MICOM data. FEBIAS Adjust FEBIAS offset is automatically adjusted from 0mV, and can be adjusted from the exterior at 100mV. When adjusting the FEBIAS at 0mV - +100mV, RX connect to VDD, and if adjusting the FEBIAS at -100mV - 0mV, RX connect to GND. After FEBIAS offset automatic adjust is complete, the FEBIAS external resistance and focus error internal resistance is connected, so adjusting Pin 63 (FEBIAS) to an optional offset value is possible.
44
VIDEO-CD 2ND GENERATION
S1L9224X01
RF SUMMING AMPLIFIER APPLICATION
The internal switch is for selecting the 1, 2x speed-related filter. It is on when 1x, and off when 2x. please adjust the according to the set.
BOOSTC2 76
250pF
50pF
55K PDA 65 55K PDC 66 VC 55K PDB 67 55K PDD 68 VC -
58K 78 2K 77 58K 2K vc + 79
RF2pF
5.6K
RFL RFO
+
2pF
+
45
S1L9224X01
VIDEO-CD 2ND GENERATION
RF EQUALIZE & AGC
Vin (t) Vcagc (t)
Modulator
Vo (t)
3x Gain AMP
HPF (3dB: 50kHz)
Vo(t) = R6(5.5K/R5(7.5K) Vin(t)tanh {2Vt/Vcagc(t)} Vin(t) = 0.73x (RFO) ARF-AGC Output Iout = 2gm (Vid/2) = gm * Vid = (Iref) * (Vid/Vt) = Iref * (Vp-Vn)/Vt Vp I/V Converter if Vn > Vp Vcagc Increment (tanh (1-X)) if Vn < Vp Vcagc Decrement (tanh (1+X))
V = I/C (115pF)
Control Range I * 10K
Full Wave Rectifier (RF Peak Envelope)
tanh tanh tanh tanh 0.1 = 0.1 0.5 = 0.462 0.1 = 0.7 2.0 = 0.964
+
Vn
Vref
The modulator output is the product of the input and Vcagcs Tanh Term. It goes through about 3x of gain blocks, then is output to the ARF pad. The output goes through the HPF with the pole frequency of 50kHz, then is full-wave rectified to follow-up the RF levels peak envelope. At this time, the HPFs pole frequency is set to 50kHz so that the 3t - 11t frequency components can pass without diminution. After full-wave rectification, the RF levels peak value is integrated to the 115pF CAP node. If this peak voltage is smaller than the pre-determined voltage, it outputs a sinking current, and if larger, it outputs a sourcing current. The maximum current peak value is 10uA, and this current is I/V converted and applied as a modulator control voltage. When sinking, the voltage of Vcagc is increased up to Iout x 10K and multiplied with Tanh(1-X), and when sourcing, the voltage of Vcagc is decreased to Iout x 10K and multiplied with Tanh(1+X). At this time, X is (Vcagc/2Vt). Overall, after detecting the 3t and 11ts level by full-wave rectification, it is compared to Tanh using the modulator and multiplied to the gain to realize the wave-form equalize. The above is related to the AGC concept, which means that a specific RF level is always taken.
46
VIDEO-CD 2ND GENERATION
S1L9224X01
OTHER BLOCK
TRACKING ERROR AMPLIFIER The side spot photo diode current which is input into blocks E and F, goes through the E loop I-V and F loop I-V AMP. It is then converted into voltage, in order to gain the difference signal in the tracking error AMP. It is MICOM programmed so that the balance is adjusted in E block, and gain is automatically adjusted in TE1.
TE1 54
TE2 LPFT 53 55
F 69
I/V Amp + B_REF_CNTR
WIN COMP 29 TRCNT WIN COMP
E 70
I/V Amp 16R 8R 4R 2R R 1/2R G_REF_CNTR
BAL [4:0] GAIN [4:0]
Gain Up/down
FOCUS OK CIRCUIT The focus ok circuit compares the DC difference value between the RFI and RFO blocks to the standard DC value. If the RF level is above standard, FOK outputs L H to make a timing window for turning the focus on during focus search status.
40K 40K RFO 79 40K RFI 80 + 90K + 57K 40 FOKB
VC + 0.625V
47
S1L9224X01
VIDEO-CD 2ND GENERATION
MIRROR CIRCUIT The mirror signal amplifies the RFI signal, than peak and bottom holds it. Peak hold can follow-up on defect-type traverse, and bottom hold can follow-up on RF envelope to count the tracks. The mirror output is the following: L within DISC tracks, H between tracks, and H when a defect above 1.4ms is detected.
38K 17K IRF 80 + 19K Peak and Bottom Hold 80K + 96K + +
1.5K 8 MCP
39 MIRROR
EFM COMPARATOR The EFM comparator makes the RF signal into a secondary signal. The asymmetry generated by a fault during DISC production cannot be eliminated by only AC coupling, so control the standard voltage of the EFM comparator to eliminate it.
ENVO ENC 17 16
ENVR 15
RF envelope detect and asymmetry/envelope DC compensation and slice AC level summing system Compensation ASY. DC -
X5
33 ASY
32 EFM2 31 EFM
RFI
3
+ 40K
48
VIDEO-CD 2ND GENERATION
S1L9224X01
DEFECT CIRCUIT After RFO signal inversion, bottom hold is carried out using only 2. Except, the bottom hold of holds the coupling level just before the coupling. Differentiate this with the coupling, then level shift it. Compare the signals to either direction to generate the defect detect signal.
DCC1 75K 37.5K RFO 79 28K 75K VC+0.6254V VC + Bottom Envelope Hold 12
DCC2 11
43K Bottom Envelope Hold 9 DCB +
24
DEFECT
APC CIRCUIT If you operate the laser diode in constant current, since it has a negative temperature characteristic with a large, it is controlled by the monitor photo diode so that the output is kept regular.
LDON 150K PD 71 + 150K 150K + -
PN 0.75K 72
300K 5.5K
49
S1L9224X01
VIDEO-CD 2ND GENERATION
CENTER VOLTAGE GENERATION CIRCUIT This circuit makes the center voltage using the resistance divide.
30K + 30K 73 VC
RF EQUALIZE CIRCUIT The AGC block maintains a steady RF peak to peak level, and has a built-in 3T gain boost function. It detects the RF envelope and compares it with the standard voltage to perform comparison gain adjustment. The received RF output stabilizes the RF level to 1Vpp, and this output is applied as the EFM slice input. EQ12 (input) and ARF (output) on/off is to select by defect duty check of internal C1flag signal.
EQC 6
EQI EQI2
1 2
VCA
Equalize
4 ARF
5 ARF2
50
VIDEO-CD 2ND GENERATION
S1L9224X01
ATSC The detect circuit for the tracking gain up (about shock) is composed of a window and a comparator.
+ -
ATSC
51
BPF Tracking Gain Up + -
51
S1L9224X01
VIDEO-CD 2ND GENERATION
FOCUS SERVO If set to phase compensate the focus servo loop, the focus servo loop is muted when defect is H. At this time, the focus error signal is integrated by the 0.1uF capacitor to be connected to the FDFCT block, and the 470K OHM resistance. It is then output through the servo loop. Therefore, during defect, the focus error output is held as the error value before the defect error. The frequency which maximizes the focus loops phase compensation is changed by the FSET block. If the resistance is 510 KOHM, the maximum frequency is 1.2kHz, and is inversely proportional to the resistance. When in focus search, FS4 is on to intercept the error signal. The focus search signal is output through the FEO block. When focus is on, FS2 is on, and the focus error signal input through the FE2 block is output to the output pin through the loop.
FSET 3.6K 3.6K + FE2 58 20K DFCT1 FZCI 48K FS4B 160K FS2B 47 FGD 27 470K 40K 46K FS3 26 580K FS3 + FS1 10K 50K 5K FE40K 82K + + Focus Phase Compensation 13 VC +
To Digital 48 FEO
FDFCT
60
25 FLB
10 FRCH
52
VIDEO-CD 2ND GENERATION
S1L9224X01
TRACKING SERVO After tracking servo loops phase compensation and during defect, the tracking error signal is integrated through 470K resistance and the 0.1uF capacitor, then output through the servo loop. RTG and TG2 blocks are tracking gain up/down exchange blocks. In phase compensation, like focus loop, the peak frequency of the phase compensation is varied by the Fset block. If the resistance connected to the FSET block changes, the OP AMP dynamic range and the offset change as well.
TE2
53 470K TM4 49 680K DFCT1 TG1 TG1B 10K 68pF 680K TM3 TE-
TDFCT
57
TM1 110K 20K TGU 61 82K TG2 62 470K TG2B Tracking Phase Compensation 10K 90K + TM7 50 TEO
13 FSET
The TM7 switch is a brake switch which turns the tracking loop on/off when the actuator is unstable after a jump. After the servo has jumped 10 tracks the servo circuit is out of the liner range, and sometimes the Actuator follows an unstable track. So this prevents unnecessary jumping caused by unwanted tracking errors. TG2 and TGU blocks adjust the tracking servo loops high frequency gain. It adjusts the gain of the wanted frequency band zone through the external cap.
53
S1L9224X01
VIDEO-CD 2ND GENERATION
SLED SERVO This servo integrates the tracking servo output to move the pick-up. Also, during Track movement, it outputs sled Kick voltage for the track jump along the sled axis.
TM6
38 SLO
TM7 37 SLM 39 SL+
PS 4 X1 X2 X3 X4 0 0 1 1 3 0 1 0 1 + -
TM2
SPINDLE SERVO & LOW PASS FILTER 200Hz LPF is configured by the 20K resistance and 0.33uF cap in order to eliminate carrier components. FSW becomes low in CLV-S mode, so more powerful filter movements are carried out.
22K SMON 22
22K 220K
15K SMDP 21 20K 15K
220K + 220K 220K
50K
+ -
46
SPDLO
100K
45 FVCO Double Speed
SPDL-
54
VIDEO-CD 2ND GENERATION
S1L9224X01
ITEM1. Mirror Mute (Used for Tracking Mute Only) This circuit is used as an ABEX-725A countermeasure, which handles tracking muting when mirror is detected. Its min and max are set, and it detects a minimum of 11kHz to a maximum of 700Hz. Except, mute does not function in the following four cases. * * * * When transmitting a MICOM tracking gain up command (TG1, TG2 = 1) When Anti-shock is detected (ATSC) When lock falls to L When defect is detected Mirror Mute Operating/APC P-SUB Interruption on (Mirror 11kHz - 0.7 kHz) Interruption off Interruption on (Mirror 2.75kHz - 0.7kHz) Interruption on (Mirror 5.5kHz - 0.7kHz) APC On $854 $856 $857 $855 APC Off $85C $85E $85F $85D
ITEM2, TRCNT Output TRCNT is an output generated by mirror and TZC. Mirror is a track movement detect output by the main beam, and TZC is a track movement detect output by side beam. TRCNT receives these 2 inputs and determines if the pickup is currently moving inwards or outwards to use it when in tracking brake of $17.
MIRROR TZC edge detect by inverter elay TZC rising, falling detect
D
Q TZC Output Mirror value is output at TZC rising, falling detect
TZC
CK
55

▲Up To Search▲

Price & Availability of S1L9224X01

	To Download S1L9224X01 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .